US 9,811,456 B2
Reliable wear-leveling for non-volatile memory and method therefor
David A. Roberts, Santa Cruz, CA (US)
Assigned to Advanced Micro Devices, Inc., Sunnyvale, CA (US)
Filed by Advanced Micro Devices, Inc., Sunnyvale, CA (US)
Filed on Nov. 26, 2014, as Appl. No. 14/554,972.
Prior Publication US 2016/0147467 A1, May 26, 2016
Int. Cl. G06F 12/02 (2006.01)
CPC G06F 12/0238 (2013.01) [G06F 2212/7211 (2013.01)] 17 Claims
OG exemplary drawing
 
12. A method comprising:
receiving read accesses to and write accesses from a memory defining a memory space;
remapping said read accesses and said write accesses using a start-gap wear-leveling algorithm;
maintaining a metadata log in a location of said memory using a log base address pointer stored in a first predetermined location of said memory and a log size stored in a second predetermined location of said memory, wherein said log base address pointer maps said metadata log to a portion of said memory space;
storing in said metadata log a start address and a gap address used in said start-gap wear-leveling algorithm; and
accessing said metadata log on initialization to retrieve an initial start address and an initial gap address for use in said start-gap wear-leveling algorithm.