US 9,811,411 B2
Management apparatus, method and program
Fumito Nakamura, Aoba (JP); and Hiroko Sato, Ota (JP)
Assigned to FUJITSU LIMITED, Kawasaki (JP)
Filed by FUJITSU LIMITED, Kawasaki-shi, Kanagawa (JP)
Filed on Sep. 11, 2015, as Appl. No. 14/851,671.
Application 14/851,671 is a continuation of application No. PCT/JP2013/057613, filed on Mar. 18, 2013.
Prior Publication US 2015/0378810 A1, Dec. 31, 2015
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01)
CPC G06F 11/0793 (2013.01) [G06F 11/0721 (2013.01); G06F 11/0748 (2013.01); G06F 11/0751 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A management apparatus which monitors hardware faults in an information processing apparatus, comprising:
a memory; and
a processor configured to use the memory and execute a process, the process comprises:
determining whether a first notification representing that a fault occurred includes identification information of hardware in which the fault occurred, upon receiving the first notification from the information processing apparatus;
first transmitting an execution request to execute a module for obtaining the identification information of the hardware to the information processing apparatus, upon determining that the first notification does not include the identification information of the hardware; and
second transmitting a stop request to stop executing the module to the information processing apparatus, upon receiving the identification information of the hardware from the information processing apparatus.