US 9,811,345 B2
Utilizing computing resources under a disabled processor node without fully enabling the disabled processor node
Douglas W. Oliver, Round Rock, TX (US)
Assigned to Lenovo Enterprise Solutions (Singapore) Pte. Ltd., Singapore (SG)
Filed by LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD., Singapore (SG)
Filed on Apr. 16, 2015, as Appl. No. 14/688,012.
Prior Publication US 2016/0306664 A1, Oct. 20, 2016
Int. Cl. G06F 9/50 (2006.01); G06F 9/46 (2006.01); G06F 9/44 (2006.01); G06F 1/24 (2006.01); G06F 3/06 (2006.01); G06F 12/00 (2006.01); G06F 1/32 (2006.01); G06F 11/00 (2006.01)
CPC G06F 9/4401 (2013.01) [G06F 1/24 (2013.01); G06F 1/3203 (2013.01); G06F 1/3243 (2013.01); G06F 1/3287 (2013.01); G06F 3/06 (2013.01); G06F 11/00 (2013.01); G06F 12/00 (2013.01); Y02B 60/1239 (2013.01); Y02B 60/1282 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method comprising:
by first program instructions on a first computing device of a computing system,
identifying a disabled processor node in the computing system, wherein the disabled processor node is installed, functional, and unutilized;
identifying one or more computing resources in the computing system that can be accessed only by the disabled processor node while the disabled processor node is enabled in the computing system; and
enabling one or more components of the disabled processor node required to access the one or more computing resources by enabling certain components including a memory controller of the disabled processor node without fully enabling the entire disabled processor node and without notifying an operating system of the computing system that any component of the disabled processor node in the computing system is enabled; and
wherein enabling the one or more components of the disabled processor node that is required to access the one or more computing resources includes preventing an entry for the disabled processor node from being added to a data structure that identifies all active devices in the computing system.