US 9,811,343 B2
Method and system for yield operation supporting thread-like behavior
Lee W. Howes, San Jose, CA (US); Benedict R. Gaster, Bristol (GB); and Michael C. Houston, Cupertino, CA (US)
Assigned to Advanced Micro Devices, Inc., Sunnyvale, CA (US)
Filed by Advanced Micro Devices, Inc., Sunnyvale, CA (US)
Filed on May 26, 2017, as Appl. No. 15/607,165.
Application 15/607,165 is a continuation of application No. 13/912,963, filed on Jun. 7, 2013, granted, now 9,697,003.
Prior Publication US 2017/0262289 A1, Sep. 14, 2017
Int. Cl. G06F 9/00 (2006.01); G06F 9/38 (2006.01); G06F 9/45 (2006.01); G06F 9/30 (2006.01)
CPC G06F 9/3851 (2013.01) [G06F 8/458 (2013.01); G06F 9/3009 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processing device, comprising:
processing circuitry configured to process a group of workitems executing an instruction stream;
the processing circuitry further configured to execute a divergent flow control compiler to determine a divergent control flow point associated with at least a first workitem and insert a synchronization instruction following the determined divergent control flow point in the instruction stream; and
the processing circuitry further configured to execute a divergent flow synchronizer to yield the processing circuitry by the first workitem responsive to the synchronization instruction in the instruction stream, update a first one of a plurality of program counters to point to a next instruction following the synchronization instruction in the instruction stream to be executed by the first workitem, and run a second workitem on the processing circuitry after the yielding;
wherein the updating of the first one of the plurality of program counters comprises storing a value corresponding to the next instruction in the first one of the plurality of program counters, wherein the first one of the plurality of program counters corresponds to a program counter of the first workitem.