US 9,811,265 B2
Buffer memory devices, memory modules and solid state disks with non-uniform memory device connections
Ji-Woon Park, Suwon-si (KR); Kwang-Soo Park, Suwon-si (KR); and Byung-Ho Kim, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (KR)
Filed on Jul. 8, 2016, as Appl. No. 15/205,570.
Claims priority of application No. 10-2015-0113496 (KR), filed on Aug. 11, 2015.
Prior Publication US 2017/0046066 A1, Feb. 16, 2017
Int. Cl. G11C 11/34 (2006.01); G06F 3/06 (2006.01); G11C 5/04 (2006.01); G11C 5/06 (2006.01); G11C 7/02 (2006.01); G11C 7/10 (2006.01)
CPC G06F 3/061 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0688 (2013.01); G11C 5/04 (2013.01); G11C 5/063 (2013.01); G11C 7/02 (2013.01); G11C 7/1048 (2013.01); G11C 2207/105 (2013.01)] 19 Claims
OG exemplary drawing
1. A memory module, comprising:
a substrate;
a control signal line on and/or in the substrate and having a proximal end configured to be coupled to a controller; and
at least two rows of memory device packages on the substrate and individually coupled to the control signal line at respective connection points spaced along the control signal line such that the control signal line runs from memory device package to memory device package, wherein a first memory device package in a first row is connected to the control signal line at a first connection point closest to the proximal end of the control signal line and a second memory device package in a second row is connected to the control signal line at a second connection point next closest to the first connection point.