US 9,811,258 B2
Methods for controlling host memory access with memory devices and systems
Neal A. Galbo, Boca Raton, FL (US); Peter Feeley, Boise, ID (US); William H. Radke, Los Gatos, CA (US); Victor Y. Tsai, Palo Alto, CA (US); and Robert N. Leibowitz, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 2, 2014, as Appl. No. 14/557,682.
Application 14/557,682 is a continuation of application No. 13/550,671, filed on Jul. 17, 2012, granted, now 8,918,600.
Application 13/550,671 is a continuation of application No. 12/477,204, filed on Jun. 3, 2009, granted, now 8,225,052, issued on Jul. 17, 2012.
Prior Publication US 2015/0153956 A1, Jun. 4, 2015
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01); G06F 13/16 (2006.01)
CPC G06F 3/0604 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0683 (2013.01); G06F 13/1642 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method for controlling host memory access with a memory device, comprising:
receiving at least one command at a memory device from a host, wherein the memory device receives a command message from the host indicating that the at least one command in host memory is ready for execution, wherein the host relinquishes control of a bus between the host and the memory device after sending the command message to the memory device, and wherein the at least one command is created in host memory and is located in the host memory by the memory device via a pointer that is sent by a memory device controller on the memory device to the host; and
controlling the timing of execution of the at least one command with the memory device by sending a data transfer message and data to the host when the memory device desires, wherein the memory device controller on the memory device sends the data transfer message to the host and the host writes the data received from the memory device according to information in the data transfer message.