US 9,811,205 B2
Variable time anti-aliasing filter
Ranga Seshu Paladugu, San Jose, CA (US); Chunbo Liu, San Jose, CA (US); and Zheming Li, San Francisco, CA (US)
Assigned to Synaptics Incorporated, San Jose, CA (US)
Filed by Synaptics Incorporated, San Jose, CA (US)
Filed on Sep. 29, 2015, as Appl. No. 14/869,595.
Prior Publication US 2017/0090669 A1, Mar. 30, 2017
Int. Cl. G06F 3/041 (2006.01); G06F 3/044 (2006.01)
CPC G06F 3/0418 (2013.01) [G06F 3/044 (2013.01); G06F 2203/04101 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A processing system for a capacitive sensing input device, said processing system comprising:
a charge integrator;
a circuit element having a first resistance, said circuit element disposed in series with an input of said charge integrator; and
a first switch coupled with the circuit element and configured to alter said first resistance to a second resistance when selectively closed during at least a portion of an integration phase of said charge integrator,
wherein said second resistance is lower than said first resistance,
wherein said first switch is one of a plurality of other switches coupled with said circuit element,
wherein said plurality of other switches are configured to open and close to alter said circuit element to a plurality of resistances in addition to said first resistance and said second resistance,
wherein at least two of said plurality of other switches are configured to be closed proximate a beginning portion of said integration phase, and
wherein said at least two of said closed switches are opened in succession, later in said integration phase, such that said circuit element is stepped up through a plurality of discrete resistances to said first resistance during said integration phase.