US 9,811,145 B2
Reduction of idle power in a communication port
Huimin Chen, Portland, OR (US); Kok Hong Chan, Folsom, CA (US); Kian Leong Phang, Bayan Lepas (MY); and Karthi Vadivelu, Folsom, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 19, 2012, as Appl. No. 13/720,531.
Prior Publication US 2014/0173166 A1, Jun. 19, 2014
Int. Cl. G06F 1/32 (2006.01); G06F 13/40 (2006.01); G06F 1/26 (2006.01)
CPC G06F 1/3253 (2013.01) [G06F 1/3215 (2013.01); G06F 1/26 (2013.01); G06F 1/3278 (2013.01); G06F 13/4022 (2013.01); Y02B 60/126 (2013.01); Y02B 60/1235 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
a downstream port comprising a physical layer to send and receive data to an upstream device via a link, the physical layer comprising:
a pull-down resistor to determine presence of the upstream device; and
a switch coupled to the pull-down resistor, the switch to disable the pull-down resistor in response to the downstream port initiating a low power state of the link between the downstream port and the upstream device, wherein the switch is controlled by input from a link layer of the downstream port; and
wherein the physical layer comprises a timer to perform periodic monitoring of the presence of the upstream device, the link layer of the downstream port to start the timer upon entering the low power state and, at the expiration of the timer, enable the pull-down resistor for a predetermined amount of time to determine whether the upstream device has been disconnected, wherein if the upstream device is detected as present, the downstream port is to disable the pull-down resistor and restart the timer.