US 9,811,142 B2
Low energy processor for controlling operating states of a computer system
Cyril de la Cropte de Chanterac, San Francisco, CA (US); Manu Gulati, Saratoga, CA (US); Erik P. Machnicki, San Jose, CA (US); Keith Cox, Sunnyvale, CA (US); and Timothy J. Millet, Mountain View, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Sep. 29, 2014, as Appl. No. 14/499,807.
Prior Publication US 2016/0091954 A1, Mar. 31, 2016
Int. Cl. G06F 1/32 (2006.01)
CPC G06F 1/3234 (2013.01) [G06F 1/324 (2013.01); G06F 1/3206 (2013.01); G06F 1/3243 (2013.01); G06F 1/3296 (2013.01); G06F 1/3203 (2013.01); Y02B 60/1217 (2013.01); Y02B 60/1239 (2013.01); Y02B 60/1285 (2013.01)] 16 Claims
OG exemplary drawing
 
6. A method, comprising:
monitoring an operational parameter of a computing system;
performing a comparison of a value of the operational parameter to a first threshold value;
generating, by a monitor circuit, an interrupt based on a result of the comparison;
sending data indicative of the operational parameter to a power manager processor of the computing system;
in response to receiving the interrupt from the monitor circuit:
exiting a low power mode;
receiving the data by the power manager processor from the monitor circuit;
performing a statistical analysis of the data, by the power manager processor, to generate analysis results, wherein the statistical analysis includes calculating an average;
adjusting, by the power manager processor, one or more performance settings in response to a determination that the analysis result is greater than a second threshold value; and
based on the results of the comparison, disabling further interrupts and enabling a timer circuit.