US 9,811,106 B2
Reference circuit arrangement and method for generating a reference voltage
Lorenzo Paglino, Zinasco (IT); and Simone Verri, San Martino Siccomario (IT)
Assigned to AMS AG, Unterpremstaetten (AT)
Filed by ams AG, Unterpremstaetten (AT)
Filed on Apr. 13, 2016, as Appl. No. 15/98,211.
Application 15/098,211 is a continuation of application No. 14/236,065, granted, now 9,317,057, previously published as PCT/EP2012/064884, filed on Jul. 30, 2012.
Claims priority of application No. 11176474 (EP), filed on Aug. 3, 2011.
Prior Publication US 2016/0224052 A1, Aug. 4, 2016
Int. Cl. H02M 3/16 (2006.01); H02M 3/20 (2006.01); G05F 3/26 (2006.01); G05F 3/16 (2006.01); G05F 3/20 (2006.01); G05F 3/30 (2006.01)
CPC G05F 3/262 (2013.01) [G05F 3/16 (2013.01); G05F 3/20 (2013.01); G05F 3/26 (2013.01); G05F 3/30 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A reference circuit arrangement comprising:
a branched first current path connecting a first and second terminal via an intermediate terminal in which the intermediate terminal is connected to a reference terminal;
a second current path that splits into first and second current paths connecting the first terminal and the second terminal to the reference terminal, respectively, wherein the reference terminal is connected with a ground potential, and wherein the first and second current paths form a y-connection to the ground potential;
a feedback loop connected to the first and second terminal designed to control, at the first and second terminal, a virtual ground potential; and
a reference path connected to the feedback loop having a reference input for receiving from the feedback loop a reference current and having a reference output to provide a reference voltage.