US 9,810,795 B2
Method and apparatus to minimise the onset and recovery time of a silicon photomultiplier
John Carlton Jackson, Blackrock (IE); Peter Ward, Oundle (GB); Donal Cronin, Blackrock (IE); and Mike Quinlan, Limerick (IE)
Assigned to SensL Technologies Ltd., Cork (IE)
Appl. No. 12/672,850
Filed by John Carlton Jackson, Blackrock (IE); Peter Ward, Oundle (GB); Donal Cronin, Blackrock (IE); and Mike Quinlan, Limerick (IE)
PCT Filed Aug. 8, 2008, PCT No. PCT/GB2008/050681
§ 371(c)(1), (2), (4) Date Jan. 28, 2011,
PCT Pub. No. WO2009/022166, PCT Pub. Date Feb. 19, 2009.
Claims priority of application No. 0715561.7 (GB), filed on Aug. 10, 2007.
Prior Publication US 2011/0108702 A1, May 12, 2011
Int. Cl. G01T 1/24 (2006.01); H01L 27/144 (2006.01)
CPC G01T 1/243 (2013.01) [G01T 1/248 (2013.01); H01L 27/1446 (2013.01)] 17 Claims
OG exemplary drawing
 
1. Silicon photomultiplier circuitry having a substantially uniform output response recovery time; the silicon photomultiplier circuitry comprising a silicon photomultiplier pixel comprising a parallel array of silicon photomultiplier microcells, each microcell comprising an on-chip quench resistor and a photodiode, the on-chip quench resistor of each microcell being positioned at least partially between an active area of two adjacent microcells to leave at least portions of the active areas available to detect light without obstruction from the on-chip quench resistor and each on-chip quench resistor being connected in series with a corresponding photodiode, the parallel array of microcells are interconnected by an on-chip metal track formed by a metal material on top of an oxide material; the silicon photomultiplier circuitry further comprising control circuitry adapted to maintain a substantially constant voltage on the on-chip metal track such that parasitic capacitance associated with the metal track as result of the metal material on the oxide material is negated from affecting the output response recovery time of a firing microcell by removing recharging of the parasitic capacitance during recovery; the constant voltage is provided on a connection node on the metal track between parallel microcells of the pixel at one of an anode or a cathode of each photodiode, the silicon photomultiplier circuitry being further configured to maintain a substantially constant voltage at the other of the anode and the cathode.