US 9,810,585 B2
Semiconductor device having a temperature circuit that provides a plurality of temperature operating ranges
Darryl G. Walker, San Jose, CA (US)
Filed by Darryl G. Walker, San Jose, CA (US)
Filed on Apr. 30, 2014, as Appl. No. 14/265,682.
Claims priority of provisional application 61/971,702, filed on Mar. 28, 2014.
Prior Publication US 2015/0276510 A1, Oct. 1, 2015
Int. Cl. G01K 7/00 (2006.01); G01K 7/16 (2006.01); G11C 7/00 (2006.01); G01K 13/00 (2006.01); H03K 3/012 (2006.01); H03K 17/14 (2006.01); H03K 17/687 (2006.01); G11C 7/04 (2006.01); G11C 11/406 (2006.01); H03K 17/22 (2006.01); H03K 21/10 (2006.01); G11C 11/4074 (2006.01); G11C 11/4093 (2006.01); G11C 11/4096 (2006.01); G11C 11/407 (2006.01); G01K 7/01 (2006.01); G01K 3/00 (2006.01)
CPC G01K 7/16 (2013.01) [G01K 3/005 (2013.01); G01K 7/00 (2013.01); G01K 7/01 (2013.01); G01K 13/00 (2013.01); G11C 7/00 (2013.01); G11C 7/04 (2013.01); G11C 11/407 (2013.01); G11C 11/4074 (2013.01); G11C 11/4093 (2013.01); G11C 11/4096 (2013.01); G11C 11/40626 (2013.01); H03K 3/012 (2013.01); H03K 17/145 (2013.01); H03K 17/223 (2013.01); H03K 17/687 (2013.01); H03K 21/10 (2013.01); Y10T 307/773 (2015.04)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
a temperature circuit providing a plurality of temperature ranges, each temperature range having a temperature range upper limit value and a temperature range lower limit value, wherein adjacent ones of the plurality of temperature ranges overlap; wherein
the temperature range lower limit value of an upper adjacent one of the temperature ranges is a lower temperature value than the temperature range upper limit value of a lower adjacent one of the temperature ranges.