US 9,808,159 B2
Solid-state image sensor and imaging apparatus including the same
Makoto Shizukuishi, Sendai (JP)
Filed by Makoto Shizukuishi, Sendai (JP)
Filed on May 8, 2014, as Appl. No. 14/272,808.
Claims priority of application No. 2013-098454 (JP), filed on May 8, 2013.
Prior Publication US 2014/0334601 A1, Nov. 13, 2014
Int. Cl. A61B 6/00 (2006.01); A61B 5/00 (2006.01); H01L 27/146 (2006.01); G01T 1/24 (2006.01)
CPC A61B 5/0062 (2013.01) [A61B 5/0035 (2013.01); A61B 5/0077 (2013.01); A61B 6/4233 (2013.01); G01T 1/243 (2013.01); H01L 27/14661 (2013.01); H01L 27/14676 (2013.01); A61B 6/4266 (2013.01); H01L 27/14634 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An image sensor comprising:
a first semiconductor chip having a first surface and a second surface;
a second semiconductor chip having a first surface and a second surface; and
a first adhesive layer between the second surface of the first semiconductor chip and the second surface of the second semiconductor chip,
the first semiconductor chip being stacked on the second semiconductor chip via the first adhesive layer such that the second surface of the first semiconductor chip faces the second surface of the second semiconductor chip, and a footprint of the first semiconductor chip is larger than a footprint of the second semiconductor chip with respect to a plan view of the image sensor,
the first semiconductor chip including an image sensing area, the image sensing area including an array of unit pixels configured to capture light corresponding to an image and to generate image signals based on the captured light, the second surface of the first semiconductor chip including first contact pads connected to the unit pixels,
the second semiconductor chip including first peripheral circuits configured to control the array of unit pixels and receive the generated image signals, the first peripheral circuits including a vertical scanning circuit, a horizontal scanning circuit, and a signal read-out circuit, the second surface of the second semiconductor chip including second contact pads connected to the first peripheral circuits, and
the first contact pads being electrically connected through the first adhesive layer to the second contact pads,
wherein,
the first peripheral circuits are located on a portion of the second semiconductor chip that falls inside a footprint of the image sensing area of the first semiconductor chip, with respect to the plan view of the image sensor,
the horizontal scanning circuit and the vertical scanning circuit are each rectangular, and not square, in shape such that the horizontal scanning circuit and the vertical scanning circuit each have two parallel longer sides and two parallel shorter sides, and
the first peripheral circuits are arranged on the second surface of the second semiconductor chip such that the longer sides of the vertical scanning circuit are parallel to the longer sides of the horizontal scanning circuit.