| US 7,471,229 B2 | ||
| Analog-to-digital converter with low latency output path | ||
| William George John Schofield, North Andover, Mass. (US); Joseph Bradford Bannon, Greensboro, N.C. (US); Carroll Speir, Pleasant Garden, N.C. (US); and Scott Bradsley, Summerfield, N.C. (US) | ||
| Assigned to Analog Devices, Inc., Norwood, Mass. (US) | ||
| Filed on Apr. 02, 2007, as Appl. No. 11/731,926. | ||
| Claims priority of provisional application 60/813922, filed on Jun. 15, 2006. | ||
| Prior Publication US 2007/0290913 A1, Dec. 20, 2007 | ||
| Int. Cl. H03M 1/12 (2006.01) | ||
| U.S. Cl. 341—162 [341/156] | 17 Claims |
| 1. An analog to digital converter system comprising:
at least one stage for providing a first full precision, full latency output; and
a second output providing a less than full latency, less than full precision coarse level indicator signal provided directly
or indirectly to a variable gain amplifier to prevent overranging of the system.
|