| US 7,469,372 B2 | ||
| Scan sequenced power-on initialization | ||
| Lewis Nardini, Richardson, Tex. (US); and Alan D. Hales, Richardson, Tex. (US) | ||
| Assigned to Texas Instruments Incorporated, Dallas, Tex. (US) | ||
| Filed on May 04, 2006, as Appl. No. 11/381,624. | ||
| Claims priority of provisional application 60/680635, filed on May 13, 2005. | ||
| Prior Publication US 2006/0259838 A1, Nov. 16, 2006 | ||
| Int. Cl. G01R 31/28 (2006.01) | ||
| U.S. Cl. 714—726 | 13 Claims |
| 1. A method of initialization of an integrated circuit including a scan chain with a scan chain input, the scan chain having
an operation mode and a scan-in mode comprising the steps of:
upon initial application of electric power to the integrated circuit setting the scan chain into the scan-in mode;
supplying a predetermined initialization input pattern to the scan chain input, said predetermined initialization input pattern
operable to place the integrated circuit in an architecturally specified reset state;
shifting said initialization input pattern into the scan chain for a predetermined number of scan clock cycles; and
following said step of shifting said initialization pattern into the scan chain setting the scan chain into the operation
mode.
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