US 7,469,348 B2
Method for dynamic insertion loss control for 10/100/1000 MHz Ethernet signaling
John R. Camagna, El Dorado Hills, Calif. (US); and Phillip John Crawley, Folsom, Calif. (US)
Assigned to Akros Silicon, Inc., Folsom, Calif. (US)
Filed on Aug. 19, 2005, as Appl. No. 11/207,602.
Claims priority of provisional application 60/665766, filed on Mar. 28, 2005.
Prior Publication US 2006/0238250 A1, Oct. 26, 2006
Int. Cl. G06F 1/00 (2006.01); G01R 27/04 (2006.01); H03B 1/00 (2006.01)
U.S. Cl. 713—300  [324/641; 375/350] 21 Claims
OG exemplary drawing
 
1. An insertion loss control limit circuit operable to supply an insertion loss limit to a coupled power feed circuit, the insertion loss control limit circuit comprising:
a first amplifier operably coupled to a pair of network power signals, wherein the amplifier is operable to generate a power estimate signal associated with the network power signals;
a rectifier operable to convert the power estimate signal into a single ended rectified power estimate; and
a loop filter operable to produce an insertion loss control limit, wherein the insertion loss control limit is based on the received pair of network power signals.