first and second substrates opposite each other, each substrate having an active region

and a dummy region;

gate and data lines substantially perpendicular to each other;

a pixel electrode and a common electrode in the active region of the first substrate;

a black matrix layer in the dummy region of the second substrate;

a UV-hardening sealant at a peripheral area surrounding the black matrix layer between the first and second substrates, wherein the UV-hardening sealant bonds the first and second substrates together;

a metal pattern between the UV-hardening sealant and the first substrate; and

a liquid crystal layer between the first and second substrates bonded by the UV-hardening sealant,

wherein the metal pattern completely overlaps the UV-hardening sealant at opposing sides of the sealant at the peripheral area at two edges of the first substrate.