US 7,468,550 B2
High-performance semiconductor package
Kwon Whan Han, Seoul (Korea, Republic of)
Assigned to Hynix Semiconductor Inc., Kyoungki-do (Korea, Republic of)
Filed on Jul. 12, 2006, as Appl. No. 11/485,125.
Claims priority of application No. 10-2006-0028522 (KR), filed on May 29, 2006.
Prior Publication US 2007/0228563 A1, Oct. 04, 2007
Int. Cl. H01L 23/02 (2006.01)
U.S. Cl. 257—678  [257/781] 13 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a semiconductor chip including a plurality of bonding pads;
an electrically conductive redistribution layer formed on the semiconductor chip while being connected with the bonding pads, said electrically conductive redistribution layer being comprised of a redistribution metal layer over a seed metal layer;
a substrate attached to an upper surface of the semiconductor chip and formed with a window for exposing the redistribution layer;
a connection member, electrically connecting the bonding pad of the semiconductor chip with the substrate;
an electrically non-conductive sealing member, substantially filling and sealing the window including the connection member and a surface of the substrate including the semiconductor chip; and
solder balls attached to the substrate.