| US 7,468,525 B2 | ||
| Test structures for development of metal-insulator-metal (MIM) devices | ||
| Steven Avanzino, Cupertino, Calif. (US); Suzette K. Pangrle, Cupertino, Calif. (US); Manuj Rathor, Milpitas, Calif. (US); An Chen, Sunnyvale, Calif. (US); Sameer Haddad, San Jose, Calif. (US); Nicholas Tripsas, San Jose, Calif. (US); and Matthew Buynoski, Palo Alto, Calif. (US) | ||
| Assigned to Spansion LLC, Sunnyvale, Calif. (US) | ||
| Filed on Dec. 05, 2006, as Appl. No. 11/633,930. | ||
| Prior Publication US 2008/0128691 A1, Jun. 05, 2008 | ||
| Int. Cl. H01L 29/10 (2006.01) | ||
| U.S. Cl. 257—48 [257/296; 257/532; 257/E21.521; 257/E21.524; 438/11; 438/14; 438/15; 438/18] | 8 Claims |
| 1. An electronic test structure comprising:
a substrate;
a conductor overlying the substrate;
an electronic device overlying a portion of the conductor and comprising a first electrode connected to the conductor, a second
electrode, and an insulating layer between the first and second electrodes;
a portion of the conductor being exposed for access thereto;
further comprising a dielectric layer overlying the conductor and substrate and on which the electronic device is disposed,
the exposed portion of the conductor being exposed through an opening in the dielectric layer.
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