| US 7,468,318 B2 | ||
| Method for manufacturing mold type semiconductor device | ||
| Naohiko Hirano, Okazaki (Japan); Nobuyuki Kato, Nisshin (Japan); Takanori Teshima, Okazaki (Japan); Yoshitsugu Sakamoto, Toyohashi (Japan); Shoji Miura, Nukata-gun (Japan); and Akihiro Niimi, Nagoya (Japan) | ||
| Assigned to DENSO CORPORATION, Kariya (Japan) | ||
| Filed on Feb. 06, 2007, as Appl. No. 11/702,498. | ||
| Application 11/702498 is a division of application No. 10/859130, filed on Jun. 03, 2004, granted, now 7,193,326. | ||
| Claims priority of application No. 2003-178147 (JP), filed on Jun. 23, 2003; and application No. 2003-184314 (JP), filed on Jun. 27, 2003. | ||
| Prior Publication US 2007/0158850 A1, Jul. 12, 2007 | ||
| Int. Cl. H01L 21/4763 (2006.01) | ||
| U.S. Cl. 438—629 [438/592; 438/625; 438/627; 438/642; 438/643] | 5 Claims |
| 1. A method for manufacturing a mold type semiconductor device including a semiconductor chip having a semiconductor part
and a metallic member, the metallic member connecting to the semiconductor chip through a conductive layer and a connecting
member, the conductive layer and the connecting member being sandwiched between the metallic member and the semiconductor
chip, the method comprising the steps of:
forming the semiconductor part on a principal plane of a semiconductor substrate so that a cell portion is provided;
forming the conductive layer on the principal plane of the semiconductor substrate;
forming a first resist layer to cover a part of the conductive layer, the part corresponding to the cell portion;
etching the conductive layer with the first resist layer as a mask so that a first conductive layer is provided;
removing the first resist layer; and
forming a second conductive layer to cover a surface and an edge of the first conductive layer,
wherein the second conductive layer has a Young's modulus, which is equal to or larger than that of the semiconductor substrate.
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