US 7,468,303 B2
Semiconductor device and manufacturing method thereof
Shigeyuki Sugihara, Gifu (Japan)
Assigned to Sanyo Electric Co., Ltd., Osaka (Japan)
Filed on Oct. 01, 2004, as Appl. No. 10/954,370.
Claims priority of application No. 2003-344170 (JP), filed on Oct. 02, 2003.
Prior Publication US 2005/0104135 A1, May 19, 2005
Int. Cl. H01L 21/336 (2006.01)
U.S. Cl. 438—305  [438/306] 4 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a gate insulation film on a semiconductor substrate;
forming a gate electrode on the gate insulation film;
forming a sidewall spacer on a sidewall of the gate electrode;
forming a low concentration diffusion layer in a surface of the semiconductor substrate adjacent the gate electrode;
forming a high concentration diffusion layer in the surface of the semiconductor substrate away from the sidewall spacer;
forming, after the formation of the low and high concentration diffusion layers, a silicide block layer on the surface of the semiconductor substrate and a surface of the gate electrode so that the silicide block layer is in contact with the low concentration diffusion layer and the sidewall spacer;
patterning the silicide block layer so as to expose a portion of the gate electrode and so as to form an opening contained within an lateral area of a top surface of the high concentration diffusion layer to expose a portion of the high concentration diffusion layer, the opening being defined only by a patterned edge of the silicide block layer and being smaller than the lateral area of the top surface of the high concentration diffusion layer;
depositing a metal layer on the surface of the semiconductor substrate and the surface of the gate electrode;
heating the semiconductor substrate so that the metal layer in contact with the exposed portions of the gate electrode and the high concentration diffusion layer becomes a metal silicide; and
removing the metal layer to expose the silicide block layer.