| US 7,467,252 B2 | ||
| Configurable I/O bus architecture | ||
| Charles Hartman, Fort Collins, Colo. (US); and Raphael Gay, Fort Collins, Colo. (US) | ||
| Assigned to Hewlett-Packard Development Company, L.P., Houston, Tex. (US) | ||
| Filed on Jul. 29, 2003, as Appl. No. 10/629,940. | ||
| Prior Publication US 2005/0027917 A1, Feb. 03, 2005 | ||
| Int. Cl. G06F 13/00 (2006.01); G06F 13/36 (2006.01); G03G 15/01 (2006.01) | ||
| U.S. Cl. 710—316 [710/302; 710/306; 710/311; 399/301] | 18 Claims |
| 1. A configurable I/O bus architecture, comprising:
a system bus interface device;
first and second I/O bus interface devices;
first and second intermediate buses;
a switching device; and
a steering signal; wherein:
the first intermediate bus couples the system bus interface device to the first I/O bus interface device;
the second intermediate bus directly couples the system bus interface device to the switching device; and
the switching device is operable to couple the second intermediate bus either to the first or to the second I/O bus interface
device responsive to the steering signal.
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