| US 7,464,379 B2 | ||
| Method and system for performing real-time operation | ||
| Tatsunori Kanai, Yokohama (Japan); Seiji Maeda, Kawasaki (Japan); Hirokuni Yano, Tokyo (Japan); and Kenichiro Yoshii, Tokyo (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Aug. 02, 2004, as Appl. No. 10/902,938. | ||
| Claims priority of application No. 2003-207572 (JP), filed on Aug. 14, 2003. | ||
| Prior Publication US 2005/0066330 A1, Mar. 24, 2005 | ||
| Int. Cl. G06F 9/46 (2006.01); G06F 1/04 (2006.01); G06F 1/12 (2006.01); G06F 15/16 (2006.01) | ||
| U.S. Cl. 718—100 [713/375] | 10 Claims |
| 1. A method of performing a real-time operation including a plurality of chained tasks periodically at specific time intervals
using a plurality of processors, the method comprising:
dividing the chained tasks into a plurality of task groups which are executable in parallel, the division based on a relationship
among the tasks regarding an order of task execution;
performing a scheduling operation of determining (i) execution start timing of each of the task groups in each time period
of time periods corresponding to the specific time intervals and (ii) which processors will execute the respective task groups
in said each time period to perform said plurality of task groups in parallel using the plurality of processors;
selecting one of the task groups whose time interval from start of the each time period to completion of an execution time
in the each time period is longest, based on the execution start timing of each of the task groups and cost information concerning
a time required to execute each of the task groups by a corresponding one of the processors at a first operating speed;
computing a ratio of the time interval corresponding to the selected one of the task groups to each of the specific time intervals;
and
performing an operating speed control operation of setting operating speeds of the processors which execute the task groups
to a second operating speed that is lower than the first operating speed in order to decrease the operating speeds of the
processors at the same rate.
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