US 7,463,539 B2
Method for burst mode, bit line charge transfer and memory using the same
Yung Feng Lin, Dasi Township (Taiwan)
Assigned to Macronix International Co., Ltd., Hsinchu (Taiwan)
Filed on Jan. 02, 2007, as Appl. No. 11/619,062.
Prior Publication US 2008/0159032 A1, Jul. 03, 2008
Int. Cl. G11C 7/00 (2006.01)
U.S. Cl. 365—203  [365/185.25; 365/189.15; 365/204; 365/233.17; 365/233.18] 8 Claims
OG exemplary drawing
 
1. A method for operating memory device for a read operation, the memory device including an array of memory cells with bit lines selectively connectable to sense amplifiers, the method comprising:
pre-charging a first set of selected bit lines to a pre-charge voltage and coupling the first set of selected bit lines to a set of sense amplifiers;
sensing data from cells coupled to the first set of selected bit lines;
transferring charge from the first set of selected bit lines to corresponding members of a second set of bit lines in response to address signals;
discharging charged bit lines other than the second set of bit lines in response to said address signals;
after said transferring charge and said discharging, pre-charging the second set of bit lines to the pre-charge voltage and coupling the second set of selected bit lines to said set of sense amplifiers in response to said address signals; and
sensing data from cells coupled to the second set of bit lines.