| 1. A method for operating a dummy memory cell having a plate line, a dummy bit line, a pass transistor, a storage node and
a storage capacitor, the storage capacitor connected between the plate line and the storage node and the pass transistor connected
between the storage node and the dummy bit line, the method comprising:
floating the dummy bit line during plate line pulsing activity;
wherein a sense amplifier connected to a memory cell that is coupled to the plate line in a core region of an array is not
connected to the dummy bit line.
|
