| US 7,463,017 B2 | ||
| Functional and stress testing of LGA devices | ||
| John Saunders Corbin, Jr., Austin, Tex. (US); Jose Arturo Garza, Pflugerville, Tex. (US); Dales Morrison Kent, Round Rock, Tex. (US); Kenneth Carl Larsen, Georgetown, Tex. (US); Howard Victor Mahaney, Jr., Cedar Park, Tex. (US); Hoa Thanh Phan, Austin, Tex. (US); and John Joseph Salazar, Austin, Tex. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on May 10, 2007, as Appl. No. 11/747,213. | ||
| Application 11/747213 is a division of application No. 11/033935, filed on Jan. 12, 2005, granted, now 7,352,200. | ||
| Prior Publication US 2007/0205757 A1, Sep. 06, 2007 | ||
| Int. Cl. G01R 31/02 (2006.01) | ||
| U.S. Cl. 324—158.1 [324/760; 324/765] | 3 Claims |
| 1. A method for controlling external loads and moments in a heatsink during testing of a chip in a test nest, the method comprising:
receiving the external loads and moments from a source associated with the chip during the testing; and
isolating the external loads and moments by absorbing both lateral loads and multi-directional moments while concurrently
allowing unrestrained vertical motion.
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