| US 7,462,537 B2 | ||
| Fabricating method of an non-volatile memory | ||
| Pin-Yao Wang, Hsinchu (Taiwan); and Liang-Chuan Lai, Hsinchu County (Taiwan) | ||
| Assigned to Powerchip Semiconductor Corp., Hsinchu (Taiwan) | ||
| Filed on Jul. 07, 2006, as Appl. No. 11/309,180. | ||
| Application 11/309180 is a division of application No. 11/164063, filed on Nov. 09, 2005, granted, now 7,102,193. | ||
| Claims priority of application No. 94120135 A (TW), filed on Jun. 17, 2005. | ||
| Prior Publication US 2007/0077711 A1, Apr. 05, 2007 | ||
| Int. Cl. H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—259 [438/233; 438/564; 257/E21.619; 257/E21.634; 257/E21.151] | 9 Claims |
| 1. A method of fabricating a non-volatile memory, the method comprising:
providing a substrate having a trench therein, wherein the trench is used for accommodating a trench device;
forming a doped metal silicide layer over the substrate within the trench, wherein a material constituting the doped metal
silicide layer comprises germanium silicide;
performing a heating process to form a source/drain region in the substrate underneath the doped metal silicide layer; and
forming a first conductive layer over the doped metal silicide layer to fill up the trench.
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