| CPC G06F 12/0811 (2013.01) [G06F 12/10 (2013.01); G06F 2212/27 (2013.01)] | 18 Claims |
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1. A method, comprising:
in a cache memory subsystem comprising:
a first-level cache accessed by a virtual address; and
a second-level cache that is set associative and has N ways, wherein the second-level cache is inclusive of the first-level cache such that when the virtual address misses in the first-level cache:
a portion of the virtual address is translated into a physical memory line address;
the physical memory line address is allocated into an entry of the second-level cache; and
a physical address proxy (PAP) for the physical memory line address is allocated into an entry of the first-level cache;
wherein the PAP for the physical memory line address includes a set and a way of the second-level cache that uniquely identify the allocated entry of the second-level cache;
receiving a physical memory line address for allocation into the second-level cache;
using a set index portion of the physical memory line address to select a set of entries of the second-level cache;
for each way of the N ways of the second-level cache, effectively forming a PAP corresponding to the way, wherein the effectively formed PAP includes the set index concatenated with the way;
for each effectively formed PAP of the N effectively formed PAPs corresponding to the N ways, generating a corresponding indicator of whether the effectively formed PAP is resident in the first-level cache; and
selecting, for replacement within the selected set of entries of the second-level cache, a way of the N ways having a corresponding indicator that indicates the corresponding effectively formed PAP is not resident in the first-level cache.
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