	US 7,461,407 B2
	Debugging port security interface
Herbert A. Little, Waterloo (Canada); Jerrold R. Randell, Waterloo (Canada); Richard C. Madter, Puslinch (Canada); and Ryan J. Hickey, Waterloo (Canada)
Assigned to Research In Motion Limited, Waterloo, Ontario (Canada)
Filed on Feb. 04, 2005, as Appl. No. 11/49,987.
Claims priority of provisional application 60/542173, filed on Feb. 05, 2004.
Prior Publication US 2005/0193220 A1, Sep. 01, 2005
Int. Cl. H04L 9/00 (2006.01); H04L 9/32 (2006.01); G06F 12/00 (2006.01); G06F 12/14 (2006.01); H04K 1/00 (2006.01)

U.S. Cl. 726—27 [726/2; 713/183; 713/189; 711/163; 711/164]

15 Claims

1. A device for allowing secure access to data stored on a memory component in a processing device comprising:

a microprocessor;

a control module connected to the microprocessor, the control module being configured to access at least one memory component;

a test control module connected to the control module, the test control module comprising an access port interface; and

a security module connected to the test control module, the security module having restricted and unrestricted security states, wherein in a restricted security state, access to debugging functions via the access port interface is limited whilst access to data stored on the at least one memory component via the access port interface is not permitted, and in first unrestricted security state, access to debugging functions is permitted whilst access to data stored on the at least one memory component via the access port interface is permitted, and in second unrestricted security state, access to debugging functions is permitted whilst access to data stored on the at least one memory component via the access port interface is not permitted;

the state of the security module being alterable from the restricted security state to the first unrestricted security states if a request for access is supplied and a password supplied through the access port interface matches a predetermined password stored in a secure, non-volatile memory accessible by the security module,and the state of the security module being further alterable from the restricted security state to the second unrestricted security state if a request for access without a password is supplied through the access port interface.