US 7,457,178 B2
Trimming of analog voltages in flash memory devices
Loc Tu, San Jose, Calif. (US); Jeffrey Lutze, San Jose, Calif. (US); Jun Wan, Sunnyvale, Calif. (US); and Jian Chen, Sunnyvale, Calif. (US)
Assigned to SanDisk Corporation, Milpitas, Calif. (US)
Filed on Jan. 12, 2006, as Appl. No. 11/331,479.
Prior Publication US 2007/0159891 A1, Jul. 12, 2007
Int. Cl. G11C 29/00 (2006.01)
U.S. Cl. 365—201  [365/185.18; 365/185.24] 11 Claims
OG exemplary drawing
 
1. A method of trimming an analog voltage in a flash memory device, comprising the steps of:
issuing a first command to place the flash memory device into a test mode, a terminal of the flash memory device has a test function when in the test mode;
measuring a threshold voltage of at least one non-volatile memory cell by applying a control gate voltage at the terminal of the flash memory device while in the test mode;
operating an analog voltage generator circuit at a plurality of output analog voltage levels to access the at least one memory cell while in the test mode;
responsive to the measuring and operating steps, setting the output analog voltage level of the analog voltage generator circuit for use in normal operation of the flash memory device; and
issuing a second command to place the flash memory device into a normal operating mode after the setting the output analog voltage level of the analog voltage generator circuit for use in normal operation;
wherein the terminal has an operating function in the normal operating mode.