| US 7,457,166 B2 | ||
| Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage | ||
| Gerrit Jan Hemink, Yokohama (Japan); and Teruhiko Kamei, Yokohama (Japan) | ||
| Assigned to SanDisk Corporation, Milpitas, Calif. (US) | ||
| Filed on Jul. 05, 2007, as Appl. No. 11/773,921. | ||
| Application 11/773921 is a continuation in part of application No. 11/296055, filed on Dec. 06, 2005, granted, now 7,403,424. | ||
| Application 11/296055 is a continuation in part of application No. 11/296028, filed on Dec. 06, 2005, granted, now 7,400,537. | ||
| Claims priority of provisional application 60/667043, filed on Mar. 31, 2005. | ||
| Prior Publication US 2008/0013360 A1, Jan. 17, 2008 | ||
| Int. Cl. G11C 11/34 (2006.01) | ||
| U.S. Cl. 365—185.29 [365/185.22; 365/218; 365/185.18] | 25 Claims |
| 1. A method of erasing non-volatile storage, comprising:
applying a first erase voltage pulse to a set of non-volatile storage elements;
applying a second erase voltage pulse to the set of non-volatile storage elements after verifying that one or more non-volatile
storage elements of the set are not sufficiently erased subsequent to application of the first erase voltage pulse, the second
erase voltage pulse having an equal or lesser magnitude than the first erase voltage pulse; and
applying a third erase voltage pulse to the set of non-volatile storage elements after verifying that one or more non-volatile
storage elements of the set are not sufficiently erased subsequent to application of the second erase voltage pulse, the third
erase voltage pulse having a greater magnitude than the second erase voltage pulse.
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