| US 7,456,459 B2 | ||
| Design of low inductance embedded capacitor layer connections | ||
| Lixi Wan, Tucker, Ga. (US) | ||
| Assigned to Georgia Tech Research Corporation, Atlanta, Ga. (US) | ||
| Filed on Sep. 06, 2006, as Appl. No. 11/516,377. | ||
| Claims priority of provisional application 60/729272, filed on Oct. 21, 2005. | ||
| Prior Publication US 2007/0108552 A1, May 17, 2007 | ||
| Int. Cl. H01L 27/108 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/119 (2006.01); H01L 29/04 (2006.01); H01L 29/12 (2006.01); H01L 31/036 (2006.01); H01L 31/112 (2006.01); H01L 29/786 (2006.01); H01L 29/80 (2006.01); H01L 29/00 (2006.01) | ||
| U.S. Cl. 257—296 [257/68; 257/71; 257/277; 257/297; 257/298; 257/299; 257/300; 257/301; 257/302; 257/303; 257/304; 257/305; 257/306; 257/307; 257/308; 257/309; 257/310; 257/311; 257/312; 257/313; 257/532; 257/535; 257/908] | 10 Claims |
| 1. A capacitor comprising the following:
a top capacitor electrode, a dielectric layer, and a bottom capacitor electrode,
said dielectric layer having a first side, an opposite second side, and at least one edge between said first and second sides
of said dielectric layer,
said top capacitor electrode covering a portion of the first side of the dielectric layer,
said bottom capacitor electrode having a first section covering a portion of the first side of the dielectric layer, and having
a second section covering a portion of the opposite second side of the dielectric layer, wherein said first and second sections
of said bottom capacitor electrode interconnect along an edge of the dielectric layer,
wherein the top capacitor electrode is smaller than the bottom capacitor electrode, the top capacitor electrode does not contact
the bottom capacitor electrode, and the top capacitor electrode is coplanar with the first section of the bottom capacitor
electrode, and the first section of the bottom capacitor electrode surrounds the top capacitor electrode and is separated
from the top capacitor electrode by a trench,
further comprising, on all sides of the capacitor, in an array, a multiplicity of vias connecting to the top capacitor electrode
on all sides of the top capacitor electrode and a multiplicity of vias connecting to the first section of the bottom capacitor
electrode on all sides of the bottom capacitor electrode, and wherein the top capacitor electrode and the vias connecting
to the top capacitor electrode act as an inner conductor, and the bottom capacitor electrode and the vias connecting to the
bottom capacitor electrode act as an outer conductor.
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