| US 7,456,096 B2 | ||
| Method of manufacturing silicide layer for semiconductor device | ||
| Takashi Yamauchi, Yokohama (Japan); Atsuhiro Kinoshita, Kamakura (Japan); Yoshinori Tsuchiya, Yokohama (Japan); Junji Koga, Yokosuka (Japan); Koichi Kato, Yokohama (Japan); Nobutoshi Aoki, Yokohama (Japan); and Kazuya Ohuchi, Yokohama (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Sep. 11, 2006, as Appl. No. 11/530,724. | ||
| Claims priority of application No. 2005-363813 (JP), filed on Dec. 16, 2005. | ||
| Prior Publication US 2007/0141836 A1, Jun. 21, 2007 | ||
| Int. Cl. H01L 29/45 (2006.01) | ||
| U.S. Cl. 438—630 [438/664; 438/682; 257/E21.165; 257/E21.627; 257/E21.641] | 6 Claims |
| 1. A method of manufacturing a semiconductor device, comprising:
forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region;
depositing a Ni layer so as to cover the impurity region;
changing the surface of the impurity region into a NiSi2 layer through annealing;
forming a Ni layer on the NiSi2 layer; and
silicidating the NiSi2 layer through annealing.
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