| US 7,456,038 B2 | ||
| Thin film transistor, integrated circuit, liquid crystal display, method of producing thin film transistor, and method of exposure using attenuated type mask | ||
| Hirotaka Yamaguchi, Kawasaki (Japan); Masakiyo Matsumura, Kamakura (Japan); and Yukio Taniguchi, Yokomaha (Japan) | ||
| Assigned to Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center, Totsuka-ku, Yokohama-shi, Kanagawa-ken (Japan) | ||
| Filed on Apr. 03, 2006, as Appl. No. 11/397,925. | ||
| Claims priority of application No. 2005-107183 (JP), filed on Apr. 04, 2005; and application No. 2005-127474 (JP), filed on Apr. 26, 2005. | ||
| Prior Publication US 2006/0240604 A1, Oct. 26, 2006 | ||
| Int. Cl. H01L 21/00 (2006.01) | ||
| U.S. Cl. 438—30 [438/142; 257/E27.1; 257/E29.117] | 17 Claims |
| 1. A method of producing a thin film transistor, comprising:
a step of forming contact holes on a photosensitive material film provided on a glass base plate after irradiating said photosensitive
material film with a ray through a mask and then developing said photosensitive material film;
wherein said ray is an i-ray;
wherein said mask pattern for exposing contact holes of said mask is a contact hole pattern including either one of a rectangular
light transmitting area and a light screening area; and
wherein said rectangular pattern is a pattern having long and short sides with length dimensions, the length dimension in
the direction of the long sides being longer than or equal to 1.4 times the length dimension in the direction of the short
sides.
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