US 11,818,969 B2
Memory devices and method of forming the same
Jianxun Sun, Singapore (SG); Juan Boon Tan, Singapore (SG); and Tupei Chen, Singapore (SG)
Assigned to GLOBALFOUNDRIES SINGAPORE PTE. LTD., Singapore (SG)
Filed by GLOBALFOUNDRIES Singapore Pte. Ltd., Singapore (SG)
Filed on Nov. 13, 2020, as Appl. No. 17/096,950.
Prior Publication US 2022/0158090 A1, May 19, 2022
Int. Cl. H01L 45/00 (2006.01); H10N 70/00 (2023.01); H10B 63/00 (2023.01)
CPC H10N 70/841 (2023.02) [H10B 63/00 (2023.02); H10N 70/021 (2023.02); H10N 70/063 (2023.02); H10N 70/8833 (2023.02)] 17 Claims
OG exemplary drawing
 
1. A memory device comprising:
a first electrode having tapered sides that converge at a top of the first electrode;
a dielectric layer disposed on and conforming to the tapered sides of the first electrode;
a resistive layer in contact with the top of the first electrode and the dielectric layer; and
a second electrode disposed on the resistive layer, wherein the resistive layer conforms to a bottom and side surfaces of the second electrode.