US 11,817,832 B2
Power amplifier output matching
Yang Liu, Irvine, CA (US); Yong Hee Lee, Tustin, CA (US); Thomas Obkircher, Santa Ana, CA (US); and William J. Domino, Yorba Linda, CA (US)
Assigned to Skyworks Solutions, Inc., Irvine, CA (US)
Filed by Skyworks Solutions, Inc., Irvine, CA (US)
Filed on Dec. 29, 2020, as Appl. No. 17/137,031.
Claims priority of provisional application 62/957,074, filed on Jan. 3, 2020.
Prior Publication US 2021/0211107 A1, Jul. 8, 2021
Int. Cl. H03F 3/191 (2006.01); H03F 3/213 (2006.01); H03F 1/56 (2006.01); H04B 1/40 (2015.01); H04B 1/3827 (2015.01)
CPC H03F 3/213 (2013.01) [H03F 1/565 (2013.01); H04B 1/3827 (2013.01); H04B 1/40 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A power amplifier system comprising:
a semiconductor-on-insulator die;
a power amplifier implemented on the semiconductor-on-insulator die and configured to amplify a radio frequency input signal having a fundamental frequency, the power amplifier including an input configured to receive the radio frequency input signal and an output configured to provide an amplified radio frequency signal; and
an output matching circuit implemented on the semiconductor-on-insulator die and including first, second, and third second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency, and including a third order harmonic rejection circuit configured to resonate at about three times the fundamental frequency, the first and second second-order harmonic rejection circuits being harmonic short circuits and the third second-order harmonic rejection circuit and the third-order harmonic rejection circuit being harmonic open circuits, the first second-order harmonic rejection circuit positioned between the output of the power amplifier and a power low supply voltage, the third-order harmonic rejection circuit positioned between the output of the power amplifier and a first node, the third second-order harmonic circuit positioned between the first node and a second node, and the second second-order harmonic circuit positioned between the second node and the power low supply voltage.