CPC H02J 7/007182 (2020.01) [G01R 31/3835 (2019.01); G01R 31/396 (2019.01); H02J 7/0048 (2020.01); H01L 29/7869 (2013.01)] | 7 Claims |
1. A battery management circuit of a battery cell comprising:
a voltage monitor circuit,
wherein the voltage monitor circuit includes a multiplexer and a buffer circuit for outputting a signal for controlling the multiplexer,
wherein the multiplexer and the buffer circuit each include an n-channel transistor, and
wherein the n-channel transistor is a transistor including an oxide semiconductor in a channel formation region.
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