US 11,817,697 B2
Method to limit the time a semiconductor device operates above a maximum operating voltage
Adam Benjamin Collura, Hopewell Junction, NY (US); Michael Romain, Beacon, NY (US); William V. Huott, Holmes, NY (US); Pawel Owczarczyk, Highland, NY (US); Christian Jacobi, West Park, NY (US); Anthony Saporito, Highland, NY (US); Chung-Lung K. Shum, Wappingers Falls, NY (US); Alper Buyuktosunoglu, White Plains, NY (US); Tobias Webel, Schwaebisch-Gmuend (DE); Michael Joseph Cadigan, Jr., Poughkeepsie, NY (US); Paul Jacob Logsdon, Poughkeepsie, NY (US); Sean Michael Carey, Hyde Park, NY (US); Stefan Payer, Stuttgart (DE); Karl Evan Smock Anderson, Poughkeepsie, NY (US); and Mark Cichanowski, Hutto, TX (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Apr. 5, 2022, as Appl. No. 17/657,989.
Prior Publication US 2023/0318286 A1, Oct. 5, 2023
Int. Cl. G06F 1/28 (2006.01); H02H 9/04 (2006.01)
CPC H02H 9/04 (2013.01) [G06F 1/28 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A method comprising:
monitoring a voltage state for a processor in a semiconductor device;
detecting, at a first time, the processor is in a high voltage state;
determining a protective current for the processor to lower the voltage state of the processor from the high voltage state;
activating at least one current generator to implement the protective current;
detecting, at a second time, the processor is in a second voltage state; and
adjusting an activation of the at least one current generator based on the second voltage state.