US 11,817,347 B2
Semiconductor device and manufacturing method of a semiconductor device
In Ku Kang, Icheon-si (KR); and Sung Hyun Yoon, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jan. 14, 2021, as Appl. No. 17/149,624.
Claims priority of application No. 10-2020-0084276 (KR), filed on Jul. 8, 2020.
Prior Publication US 2022/0013651 A1, Jan. 13, 2022
Int. Cl. H10B 43/27 (2023.01); H01L 21/764 (2006.01); H01L 29/10 (2006.01); H01L 21/768 (2006.01)
CPC H01L 21/764 (2013.01) [H01L 21/76831 (2013.01); H01L 29/1037 (2013.01); H10B 43/27 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a stack structure including conductive patterns spaced apart from each other;
a channel structure penetrating the stack structure;
a slit insulating layer penetrating the stack structure in a first direction; and
a source contact in contact with the slit insulating layer,
wherein air gaps are defined between the conductive patterns,
wherein the slit insulating layer includes a first interposition part covering a sidewall of one of the conductive patterns and a second interposition part covering one of the air gaps from the side,
wherein a smallest width of the second interposition part in a second direction perpendicular to the first direction is smaller than a smallest width of the first interposition part in the second direction,
wherein the source contact includes a first contact part covering the first interposition part of the slit insulating layer and a second contact part covering the second interposition part of the slit insulating layer, and
wherein an interface between the first contact part of the source contact and the first interposition part of the slit insulating layer is convex towards the first contact part of the source contact.