US 11,817,344 B2
Method for manufacturing shallow trench isolations
Liyuan Liu, Shanghai (CN); Li He, Shanghai (CN); Fulong Qiao, Shanghai (CN); and Yi Wang, Shanghai (CN)
Assigned to Shanghai Huali Microelectronics Corporation, Shanghai (CN)
Filed by Shanghai Huali Microelectronics Corporation, Shanghai (CN)
Filed on Oct. 4, 2021, as Appl. No. 17/493,229.
Claims priority of application No. 202011377953.1 (CN), filed on Nov. 30, 2020.
Prior Publication US 2022/0172982 A1, Jun. 2, 2022
Int. Cl. H01L 21/762 (2006.01); H01L 21/308 (2006.01); H01L 21/3213 (2006.01)
CPC H01L 21/76224 (2013.01) [H01L 21/3086 (2013.01); H01L 21/3088 (2013.01); H01L 21/32139 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A method for manufacturing shallow trench isolations, comprising:
providing a substrate, the substrate comprising a storage cell area and a peripheral area of a storage device, wherein a gate dielectric layer and a floating gate layer are further sequentially formed on an upper surface of the substrate in a height direction of the substrate;
etching an upper part of the substrate of the storage cell area using a first etching process to form a first shallow trench, etching the gate dielectric layer and the floating gate layer together to form a floating gate structure of each storage cell, filling the first shallow trench with a first silicon oxide using a first deposition process to form a first shallow trench isolation, and forming the first silicon oxide between the floating gate structures of the storage cells, wherein the formed first silicon oxide further covers the floating gate structures; and
etching an upper part of the substrate of the peripheral area using a second etching process different from the first etching process to form a second shallow trench, and filling the second shallow trench with second silicon oxide using a second deposition process different from the first deposition process to form a second shallow trench isolation, wherein
a depth of the first shallow trench is smaller than a depth of the second shallow trench, and a characteristic dimension of the first shallow trench is smaller than a characteristic dimension of the second shallow trench, and
wherein the second etching process further comprises: etching the upper part of the substrate in the peripheral area using the first silicon oxide as a hard mask later of the storage cell area.