| CPC G11C 16/3459 (2013.01) [G11C 16/08 (2013.01); G11C 16/102 (2013.01); G11C 16/16 (2013.01); G11C 16/24 (2013.01); G11C 16/30 (2013.01)] | 20 Claims |
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1. An operation method of a nonvolatile memory device which includes a memory block including a plurality of wordlines and a plurality of bitlines, the method comprising:
performing an erase operation on the memory block using a 0-th erase voltage;
performing a block verification operation on the memory block using a 0-th erase verification voltage;
performing, in response to a result of the block verification operation being determined as a pass, a delta verification operation on the memory block; and
outputting, in response to the result of the block verification operation or a result of the delta verification operation, information of whether the erase operation performed on the memory block is determined as a pass or a fail,
wherein the plurality of wordlines are grouped into a plurality of wordline groups, and
wherein the delta verification operation includes:
generating a plurality of first delta counting values respectively from the plurality of wordline groups using a first sensing condition;
generating a first delta value based on the plurality of first delta counting values;
comparing the first delta value and a first reference value; and
generating, in response to the first delta value being smaller than the first reference value, a plurality of second delta counting values respectively from the plurality of wordline groups using a second sensing condition.
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