| CPC G09G 3/32 (2013.01) [G09G 3/3266 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0264 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/06 (2013.01)] | 20 Claims |
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1. A scan driver comprising:
scan stages, wherein a first scan stage among the scan stages includes:
a third transistor including a first electrode connected to a previous carry line, a second electrode, and a gate electrode connected to a first control line;
a twenty-third transistor including a first electrode connected to a first power line, a second electrode, and a gate electrode connected to the second electrode of the third transistor;
a twenty-fourth transistor including a first electrode connected to the second electrode of the twenty-third transistor, a second electrode connected to a QB node, and a gate electrode connected to a third control line;
a fifth transistor including a first electrode connected to a second control line, a second electrode, and a gate electrode electrically connected to the second electrode of the third transistor;
a sixth transistor including a first electrode connected to the second electrode of the fifth transistor, a second electrode connected to a Q node, and a gate electrode connected to the third control line;
a ninth transistor including a first electrode connected to a carry clock line, a second electrode connected to a carry line, and a gate electrode connected to the Q node;
a thirteenth transistor including a first electrode connected to the carry line, a second electrode connected to the first power line, and a gate electrode connected to the QB node;
a first transistor including a first electrode connected to a scan clock line, a second electrode connected to a scan line, and a gate electrode connected to the Q node; and
a seventeenth transistor including a first electrode connected to the scan line, a second electrode connected to a second power supply line, and a gate electrode connected to the QB node.
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