CPC G06F 13/4027 (2013.01) [G06F 3/0613 (2013.01); G06F 3/0659 (2013.01); G06F 3/0689 (2013.01); G06F 13/4068 (2013.01)] | 20 Claims |
1. A storage system comprising:
a main processor;
a backplane connected to the main processor through conductive lines; and
a plurality of storage devices including a first storage device and a second storage device, each of the plurality of storage devices including:
a first port;
a second port;
a field programmable gate array (FPGA) board connected to the second port of a corresponding storage device; and
a storage controller comprising a first interface circuit connected to the first port of the corresponding storage device and a second interface circuit connected to the FPGA board of the corresponding storage device,
wherein the first port of the first storage device is configured to be connected to the backplane through a first cable, and
wherein the second port of the first storage device is configured to be connected to the first port of the second storage device through a second cable.
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