| US 7,451,324 B2 | ||
| Secure execution mode exceptions | ||
| Rodney W. Schmidt, Dripping Springs, Tex. (US); Brian C. Barnes, Round Rock, Tex. (US); Geoffrey S. Strongin, Austin, Tex. (US); and David S. Christie, Austin, Tex. (US) | ||
| Assigned to Advanced Micro Devices, Inc., Austin, Tex. (US) | ||
| Filed on May 31, 2002, as Appl. No. 10/161,500. | ||
| Prior Publication US 2003/0226022 A1, Dec. 04, 2003 | ||
| Int. Cl. G06F 21/22 (2006.01) | ||
| U.S. Cl. 713—187 [713/189] | 13 Claims |
| 1. A system, comprising:
one or more security check units configured to monitor requests, wherein the one or more security check units is further configured
to generate a security exception in response to one or the requests;
a plurality of secure storage locations; and
a processor configured to:
create a security exception stack frame within secure memory at a base address; and
write a faulting code sequence address and one or more register values into the security exception stack frame;
wherein the processor is further configured to execute a security kernel, wherein the security kernel is configured to:
execute a plurality of security exception instructions.
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