| US 7,450,427 B2 | ||
| Non-volatile semiconductor memory device | ||
| Junichi Yamada, Kanagawa (Japan) | ||
| Assigned to NEC Electronics Corporation, Kanagawa (Japan) | ||
| Filed on Sep. 20, 2006, as Appl. No. 11/523,550. | ||
| Claims priority of application No. 2005-275848 (JP), filed on Sep. 22, 2005. | ||
| Prior Publication US 2007/0064479 A1, Mar. 22, 2007 | ||
| Int. Cl. G11C 16/06 (2006.01) | ||
| U.S. Cl. 365—185.2 [365/185.21; 365/203; 365/210] | 18 Claims |
| 1. A non-volatile semiconductor memory device comprising:
a memory cell;
a reference cell including a same structure as said memory cell;
a detecting circuit configured to detect a timing when a voltage of a reference bit line connected with said reference cell
becomes lower than or equal to a setting voltage, and to generate a control signal in response to the detection of the timing;
and
a sense amplifier configured to sense and amplify a difference between a voltage of a bit line connected with said memory
cell and a reference voltage in response to said control signal.
|