US 11,812,670 B2
Memory device comprising a top via electrode and methods of making such a memory device
Yanping Shen, Saratoga Springs, NY (US); Haiting Wang, Clifton Park, NY (US); and Sipeng Gu, Clifton Park, NY (US)
Assigned to GlobalFoundries U.S. Inc., Malta, NY (US)
Filed by GlobalFoundries U.S. Inc., Malta, NY (US)
Filed on Nov. 3, 2022, as Appl. No. 18/052,307.
Application 18/052,307 is a division of application No. 16/855,745, filed on Apr. 22, 2020, granted, now 11,569,437.
Prior Publication US 2023/0078730 A1, Mar. 16, 2023
Int. Cl. H10N 50/80 (2023.01); H10B 51/30 (2023.01); H10B 61/00 (2023.01); H10B 63/00 (2023.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01); H10N 50/85 (2023.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01)
CPC H10N 50/80 (2023.02) [H10B 51/30 (2023.02); H10B 61/00 (2023.02); H10B 63/00 (2023.02); H10N 50/01 (2023.02); H10N 50/10 (2023.02); H10N 50/85 (2023.02); H10N 70/011 (2023.02); H10N 70/231 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02); H10N 70/881 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a spacer structure above a memory state material of a memory cell, the spacer structure having a generally U-shaped configuration when viewed in a vertical cross-section;
forming at least one first layer of insulating material above the generally U-shaped spacer structure;
forming a contact opening in the at least one first layer of insulating material, whereby the contact opening exposes the generally U-shaped spacer structure;
performing an etching process through the contact opening on the generally U-shaped spacer structure so as to remove a portion of the generally U-shaped spacer structure and thereby form an internal sidewall spacer positioned above at least a portion of the memory state material, the internal sidewall spacer defining a spacer opening that exposes at least a portion of the memory state material; and
forming a conductive contact structure in the contact opening, the conductive contact structure comprising a conductive line portion and a conductive via portion, wherein the conductive via portion is formed in the spacer opening and wherein the conductive via portion contacts the memory state material.