CPC H04L 7/0008 (2013.01) [G06F 3/162 (2013.01); H04R 3/00 (2013.01); H04R 19/04 (2013.01); H04R 29/004 (2013.01); G01R 23/10 (2013.01); G10H 5/002 (2013.01); H03D 13/003 (2013.01); H03F 3/183 (2013.01); H03F 2200/03 (2013.01); H04M 1/00 (2013.01); H04R 2201/003 (2013.01)] | 22 Claims |
1. A digital microphone, comprising:
a first component that provides data indicative of a clock frequency of operation in a functional mode of a digital microphone, the clock frequency clocking one or more microphone components having switching activity;
a second component that determines, using the clock frequency, an amount of bias current to supply to at least a first microphone component of the one or more microphone components, and based on determining that the clock frequency has remained unchanged relative to a previously measured clock frequency, implements a time delay of a defined magnitude prior to receiving and processing additional data indicative of the clock frequency; and
a memory device that retains control parameters that include at least one of a first group of parameters defining a relationship between current and frequency and a second group of parameters defining a quantization of the relationship, the quantization including multiple bias current levels for respective frequency intervals.
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