US 11,810,982 B2
Nonvolatile memory device with a doped region between a source and a drain and integration schemes
Yongshun Sun, Singapore (SG); Shyue Seng Tan, Singapore (SG); Eng Huat Toh, Singapore (SG); and Xinshu Cai, Singapore (SG)
Assigned to GLOBALFOUNDRIES SINGAPORE PTE. LTD., Singapore (SG)
Filed by GLOBALFOUNDRIES Singapore Pte. Ltd., Singapore (SG)
Filed on Aug. 2, 2021, as Appl. No. 17/391,031.
Prior Publication US 2023/0029507 A1, Feb. 2, 2023
Int. Cl. H01L 29/788 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/161 (2006.01)
CPC H01L 29/7883 (2013.01) [H01L 29/1083 (2013.01); H01L 29/161 (2013.01); H01L 29/66825 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A nonvolatile memory device comprising:
a floating gate over a first p-well in a substrate;
an n-doped source, an n-doped drain, and a doped region in the first p-well, wherein the doped region is at least partially under the floating gate and adjacent to one of the source and the drain and spaced from the other of the source and the drain; and
halo regions adjacent to the source and the drain, wherein the doped region overlaps one of the halo regions adjacent to the source and the drain.