US 11,810,915 B2
Semiconductor package with redistribution substrate having embedded passive device
Kyoung Lim Suk, Suwon-si (KR); Seokhyun Lee, Hwaseong-si (KR); and Jaegwon Jang, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jun. 25, 2021, as Appl. No. 17/359,110.
Claims priority of application No. 10-2020-0153634 (KR), filed on Nov. 17, 2020.
Prior Publication US 2022/0157810 A1, May 19, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 27/08 (2006.01); H01L 23/538 (2006.01); H01L 49/02 (2006.01)
CPC H01L 27/0805 (2013.01) [H01L 23/5222 (2013.01); H01L 23/5386 (2013.01); H01L 24/14 (2013.01); H01L 28/60 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a redistribution substrate;
a package substrate, below the redistribution substrate, comprising a first metal line;
a first solder pattern between the redistribution substrate and the package substrate;
a first passive device in the redistribution substrate, the first passive device comprising a first terminal and a second terminal; and
a first semiconductor chip on a top surface of the redistribution substrate, the first semiconductor chip vertically overlapping at least a portion of the first passive device,
wherein the redistribution substrate comprises:
a dielectric layer in contact with a first lateral surface, a second lateral surface opposite to the first lateral surface, and a bottom surface of the first passive device;
a lower conductive pattern on the first terminal;
a lower seed pattern provided between the first terminal and the lower conductive pattern, and directly connected to the first terminal;
a first upper conductive pattern on the second terminal;
a first upper seed pattern provided between the second terminal and the first upper conductive pattern, and directly connected to the second terminal; and
a first redistribution pattern laterally spaced apart from the first passive device without being connected to the first passive device, and
wherein the first metal line in the package substrate is connected to the first redistribution pattern in the redistribution substrate through the first solder pattern.