US 11,810,623 B2
Semiconductor memory device, controller, and operating method thereof
Un Sang Lee, Icheon-si (KR); and Moon Sik Seo, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Aug. 5, 2021, as Appl. No. 17/395,166.
Claims priority of application No. 10-2021-0022127 (KR), filed on Feb. 18, 2021.
Prior Publication US 2022/0262442 A1, Aug. 18, 2022
Int. Cl. G11C 7/00 (2006.01); G11C 16/26 (2006.01); G11C 5/02 (2006.01); G11C 16/04 (2006.01); G06F 12/02 (2006.01); G11C 5/06 (2006.01)
CPC G11C 16/26 (2013.01) [G06F 12/0246 (2013.01); G11C 5/025 (2013.01); G11C 5/06 (2013.01); G11C 16/0483 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An operating method of a controller for controlling a semiconductor memory device including a plurality of memory cells, the method comprising:
generating program data to be stored in a selected page of the semiconductor memory device; and
controlling the semiconductor memory device to program the program data in the selected page,
wherein a threshold voltage of a memory cell located on a predetermined column maintains an erase state after program operation is complete, according to bit data at a predetermined position corresponding to the predetermined column in the program data.